Japan Approves TSMC Kumamoto for 3nm Production, Capped at 6,000 Wafers

Japan's METI approved the revised plan for TSMC's second Kumamoto fab on October 16, 2026, making it the country's first 3nm logic facility. Initial output is set at 6,000 wafers per month instead of 48,000 at 6nm/12nm, limited by ASML EUV tool supply; mass production is targeted for December 2028.

• Initial capacity is 6,000 wafers per month at 3nm versus 48,000 in the original plan
• Subsidies cut from ¥732B to ¥645.15B, total package now ¥1.055T
• ASML ships only 50–60 EUV systems a year, each costing over $150M
• TSMC's total Kumamoto capex across both fabs exceeds $23B