Japan approves TSMC's 3nm chip plan for second Kumamoto fab

Japan's Ministry of Economy, Trade and Industry approved on Oct. 16 a revised TSMC plan to produce 3-nanometer logic chips at its second fab in Kumamoto Prefecture on the island of Kyushu.

• METI approved the revised TSMC plan on Oct. 16
• The second Kumamoto fab will make 3nm logic chips
• The site is in Kumamoto Prefecture on Kyushu