Intel: closing tech gap with TSMC matters less than scale and execution

Intel says it has largely caught up with TSMC in process technology, but matching the Taiwanese company's wafer capacity will take considerably longer. CTO Pushkar Ranade argued that yields and on-schedule delivery matter more than a few percentage points in transistor density. VP Chris Auth defended High NA EUV combined with backside power delivery for the 14A process.

• Intel is preparing 14A with High NA EUV and backside power delivery
• Ranade: manufacturing metrics differ by only a few percent
• TSMC produces substantially more wafers than Intel
• Vertical transistor stacking still introduces gaps and voids