FTCO and digital twins speed up photonic IC simulation

A Fab Technology Co-Optimization workflow combines GDS layout import, 3D process simulation, GPU-accelerated FDTD, design of experiments and AI surrogate modeling. A directional-coupler DOE with 25 combinations of four process variations on a 65-million-cell 3D model completes in under 10 hours on a single NVIDIA A100 workstation.

• Modeling includes sidewall angle, CD bias, thickness variation and line-edge roughness
• DOE covers 25 combinations of four process variations on a 65-million-cell model
• Simulation finishes in under 10 hours on one NVIDIA A100 workstation
• The digital twin gives non-experts real-time access to process-to-performance links