Kyocera and Tohoku University integrate optical isolators onto silicon photonics ICs

Kyocera and Tohoku University's RIEC developed a monolithic integration technique that places optical isolators directly on silicon photonics chips using localized laser annealing. The method crystallizes magneto-optical garnet at around 600 °C without damaging electrodes or nearby circuits, achieving a 13.6 dB isolation ratio.

• Laser annealing heats only the ~700×700 µm isolator region
• Isolation ratio of 13.6 dB cuts back-reflected light by about 95%
• Approach avoids furnace heating of the whole chip, protecting electrodes and optics