Cadence and Notre Dame speed up 3D-IC thermal analysis 178x

Cadence Design Systems and the University of Notre Dame published DAIST, a composable thermal solver for heterogeneous 2.5D/3D-IC packages. It decomposes the package into block-level subdomains solved by neural operators and coupled iteratively, achieving up to 178x speedup over FEM with mean temperature errors of 0.068% and 0.323%.

• DAIST delivers up to 178x speedup over traditional FEM solvers
• Mean temperature errors of 0.068% and 0.323% on two systems
• Block-level neural operators are reused without retraining across topologies
• Iteration budget trades accuracy for runtime