SK Hynix develops SSD controllers with over 100 H-TPUs

SK Hynix has detailed its H-TPU architecture for SSD controllers, distributing more than 100 compact processors to handle repetitive I/O operations. Each H-TPU takes 4% of a general-purpose CPU core's area and about 2.5% of its power. The technology targets enterprise SSDs, the Storage Next architecture and High Bandwidth Flash.

• Each H-TPU uses 4% of a CPU core's area and 2.5% of its power
• The controller activates only the units needed per request
• Storage Next handles requests of 512 bytes or less instead of 4KB
• No timeline for commercial H-TPU products was disclosed