Hardware2 hOctober 21, 2026, 08:55

UltraRISC unveils UR-CP400 RISC-V core with 8-wide out-of-order design

Shanghai-based UltraRISC showed the UR-CP400 processor core at RISC-V Summit China, targeting customer delivery in Q1 2027. The RVA23-compliant core claims over 22 SPECint_base2006 per GHz from FPGA emulation, with 8-wide out-of-order issue and a 14-stage pipeline.

Pandaily

Open source

UltraRISC unveils UR-CP400 RISC-V core with 8-wide out-of-order design

UR-CP400 uses 8-wide out-of-order issue and a 14-stage pipeline
Company claims over 22 SPECint_base2006 per GHz, measured on FPGA emulation
Design delivery to licensees planned for Q1 2027
Supports RVA23 profile and RISC-V vector extension 1.0

#UltraRISC#RISC-V

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