SK Hynix, Micron tackle AI memory bottlenecks via HBM standardization

SK Hynix and Micron are betting on HBM standardization and chip integration to overcome memory bandwidth limits in AI infrastructure. Competition is shifting from individual chip performance to data-transfer power consumption, transistor scaling and advanced packaging.

• AI chip competition shifts to memory bandwidth and data-transfer power consumption
• SK Hynix and Micron push HBM standardization and chip integration
• HBM capacity shift pushed DDR4 contract prices up faster than DDR5
• TSMC keeps 3nm, 2nm and CoWoS tight amid AWS and MediaTek demand