Experts: Heat Is Becoming a Major Chip Design Challenge

At the DAC conference, experts from Synopsys, Silvaco, Keysight EDA, Siemens EDA and Vinci discussed growing thermal challenges as dies are stacked and vertically integrated. They said voltage, timing, resistance, power and temperature must be analyzed together, and full 3D-ICs will require new materials and cooling approaches.

• Thermal, voltage and timing must be co-optimized in a single loop
• Full 3D-ICs will require new materials and cooled interposers
• Agentic AI could help engineers cross traditional discipline silos
• A stack of 16 HBMs in one package already counts as a 3D-IC