Hardware1 hOctober 14, 2026, 07:51

Gelsinger: AI eases chip design but hits memory and energy walls

Former Intel CEO Pat Gelsinger said AI is making chip design easier, while physical bottlenecks in manufacturing, memory and energy are driving an unprecedented hardware renaissance. He points to memory and optical interconnects as the key constraints.

Digitimes

Open source

Gelsinger: AI eases chip design but hits memory and energy walls

Gelsinger: AI simplifies and speeds up chip design
Main bottlenecks are manufacturing, memory and energy
Focus shifts to optical interconnects and new memory types

#Intel#PatGelsinger

Ex-Intel CEO Gelsinger Calls HBM a "Hideous Memory" as Nanya Sees DRAM Shortages Till 2028

Hardware

Memory wall reshapes chip design as large-capacity SRAM becomes key for autonomous driving SoCs

Hardware

Gelsinger: AI eases chip design but hits memory and energy walls

Ex-Intel CEO Gelsinger Calls HBM a "Hideous Memory" as Nanya Sees DRAM Shortages Till 2028

Memory wall reshapes chip design as large-capacity SRAM becomes key for autonomous driving SoCs

Pat Gelsinger-backed PicoJool raises $27.5M for AI cluster optical interconnects

Vast uses tiered storage to ease AI agent memory demands